Masters Degrees (Electrical Engineering)

Permanent URI for this collection

https://hdl.handle.net/10413/6856

Browse

Now showing 1 - 20 of 192

A software speech recognition system using a phonetic approach.
(1985) Everson, L Robert H.; Broadhurst, Anthony D.; Levy, David C.
Computer speech recognition techniques were investigated. This investigation included a study of the hearing and speech process. An algorithm was developed that used nine features to identify the phonemes in speech signals. Two of these features, the total energy and the number of zero crossings in a specific section of the speech signal, were obtained directly from the digitized speech signal. The other features, frequency energy bands and formant frequencies, were measured from a spectral analysis of the signal. A Hewlett Packard mini-computer was used for the development of the necessary software in FORTRAN. For the testing of the algorithm ten words, "zero" through to "nine" were used.
Data base optimisation for an I.C. design layout package on the VAX.
(1987) Figg, Peter Gerald.; Peplow, Roger Charles Samuel.
The performance of an interactive graphics/computer aided design system, such as the IC layout and rule checking package implemented as part of the schematic drawing application on the Gerber Systems Technology IDS-80, is very closely related to the performance of the system's data base. This is due to the fact that most editing functions on an interactive graphics/CAD system are data base intensive functions and the data base and its management routines form one of the major building blocks of a CAD system. It can therefore be said that the performance of a CAD system is directly dependent on the data base access time and the efficiency of the managing routines. The primary objective of this project was to enhance the performance of the IC layout and rule checking package. This was done by improving the performance of the data base of the system. This was achieved by following two mutually supportive paths. The first was the transportation of the software to a new host machine which had a 32-bit processor and virtual memory capabilities. The second was to try and improve the performance of the transported data base by utilising sophisticated data base structures and memory management·techniques facilitated by the larger available memory of the new host to optimise the data base operations. The effectiveness of the two paths in achieving their respective goals was evaluated using evaluation programs which simulated characteristic data base activities.This thesis documents the above process, as well as expounds on some of the background related theory which was instrumental in the progress of the project and the drawing of the final conclusions.
Colour measurement and colour reproduction systems.
(1987) Chalmers, Andrew Neil.; Nattrass, Henry Lee.
Techniques of colour measurement and colour reproduction are important in a wide range of commercial and social activities in most modern economies. Their study thus constitutes one of the major areas of interest to the CIE. The project described in this thesis began as an outgrowth of studies of new types of light sources and of the colorimetry of colour-TV systems; plus a conviction that modern TV cameras can operate effectively with a wide range of different illuminating spectra. It was soon evident that two important prerequisites for this research were: an understanding of the processes of human colour vision; and a knowledge of the standard, international, colorimetric terminology of the CIE. These topics are discussed fully in the text. Also included is a review of modern gas-discharge lamps, the~y properties, and their applications. Both high-pressure (HID) types and low-pressure (fluorescent-tube) types are considered. Because of the need to measure the colours of surfaces and their TV reproductions as accurately as possible, various forms of colorimeter were examined, leading to the choice of a spectrophotometer system for this work. The design, construction, and evaluation of an original spetrophotometer system (the UND Spectrophotometer) are described fully in the text. Finally, attention is given to the operation of a television system under nonstandard lighting. Twelve different light sources were evaluated as TV ((taking" illuminants, using both subjective and colorimetric methods of assessment. The experimental results tend to confirm that colorimetric methods are unsuited to colour reproduction evaluation, and that subjective methods are more meaningful. A subjective scale of colour reproduction performance was established, and it was found to correlate closely with the CIE general colour rendering index (Ra) for the various test lamps. The work reported herein predates similar experiments with TV lighting by other workers, and it includes a wider range of light sources. In spite of differences in experimental technique, however, there is broad agreement with their general results.
The Analysis of computer systems for performance optimisation.
(1987) Meiring, Pierre Andre.; Nattrass, Henry Lee.
The project investigated the problem of performance optimisation of computer systems at the systems level. It was ascertained that no generally accepted technique for approaching this problem exist. A theoretical approach was thus developed which describes the system, the workload and the performance in terms of matrices which are deduced from measured data. An attempt is then made to verify this theory by applying it to a real system in a controlled environment. A dummy workload is used and measurements are made on the computer system for various configurations. The results thus obtained are compared with the expected trends in system performance and conclusions are drawn which appear to verify the validity of the theory proposed.
A graphic rasterizer IC.
(1987) Izzard, Martin John.; Poole, Kelvin F.; Peplow, Roger Charles Samuel.
A single chip line-rasterizer that overcomes the major bottleneck in graphics display systems has been designed by the author on a 4408 element gate array marketed by Plessey Semiconductors limited. The rasterizer was fabricated by Plessey using their 2 micron, double-level metal ISO CMOS process, in the United Kingdom. Two identifiable bottlenecks in the redraw speed on a general graphics display system are video memory bandwidth and rasterization speed (in dots produced per second). The rasterizer described here is capable of working in parallel with other rasterizers to overcome the rasterization bottleneck. Systems incorporating it are flexible and expandable. The rasterizer requests a primitive from a host or master part of the system. Once it has a primitive to work on, it begins rasterization. The rasterizer queues requests to write dots to the video memory part of the system. The device accepts two ordered pairs of 16-bit numbers as start-of-line and end-of-line coordinates, on an 8-bit bus; the dot addresses are in the form of two 16-bit numbers on a 32-bit bus. Simulation with CLASSIC showed that the device could be clocked at up to 8 MHz and would then produce dots at between 2 MHz and 4 MHz (dependent on the type of line) after the initial analysis overheads. This means that any video memory bandwidth may be fully used with this device and any improvements in memory bandwidth may be taken advantage of in a system using the parallel rasterization scheme. The Plessey test engineers exercised the device to prove the success of the fabrication. Further tests were performed by the author. In these, the rasterizer was seen to gather data correctly. The rasterization of a range of different types of lines, manhattan and general, short and long and lines of different direction, was tested. The various algorithm terminations were verified and all branches exercised. The flow control on the pixel bus was checked. The device used for all the tests, performed correctly at 10 MHz (design specification 8 MHz) which corresponds to a maximum rasterization speed of 5 MHz for 0° and 90° lines and between 2.5 MHz and 3.3 MHz for general lines. The results show that the rasterizer performance will allow full use of the memory bandwidth of the system and hence overcome the major bottleneck in many graphics display systems.
Implementation of a proprietary CAD graphics subsystem using the GKS standard interface.
(1989) Davies, Trevor Rowland.; Peplow, Roger Charles Samuel.
This project involved porting a Graphical Software Package (GSP) from the proprietary IDS-BO Gerber CAD system onto a more modern computer that would allow student access for further study and development. Because of the popularity of Unix as an "open systems environment", the computer chosen was an HP9000 using the HP-UX operating system. In addition, it was decided to implement a standard Graphical Kernel System (GKS) interface to provide further portability and to cater for the expected growth of the GKS as an international standard. By way of introduction, a brief general overview of computer graphics, some of the essential considerations for the design of a graphics package and a description of the work undertaken are presented. Then follows a detailed presentation of the two systems central to this project i) the lDS-8O Gerber proprietary CAD system, with particular attention being paid to the Graphical Software Package (GSP) which it uses and ii) the Graphical Kernel System (GKS) which has become a widely accepted international graphics standard. The major differences between the lDS-8O Gerber GSP system and the GKS system are indicated. Following the theoretical presentation of the GSP and GKS systems, the practical work involved in first implementing a "skeleton" GKS interface on the HP9000 Unix System, incorporating the existing Advanced Graphics Package (AGP) is presented. The establishment of a GKS interface then allows an lDS-8O Gerber GSP interface to be developed and mapped onto this. Detailed description is given of the methods employed for this implementation and the reasons for the data structures chosen. The procedures and considerations for the testing and verification of the total .system implemented on the HP9000 then follow. Original lDS-8O Gerber 2-D .applications software was used for the purpose of testing. The implementation of the data base that this software uses is also presented. Conclusions on system performance are finally presented as well as suggested areas for possible further work.
Performance, models and topologies of common channel signalling system number seven.
(1998) Ramlakan, R. S.; Mneney, Stanley Henry.
An Intelligent Network (IN) can be visualised as a central computer interconnected to the telecommunication network that allows the creation and deployment of services as consumer demand arises. Messages or information are transferred between the central processor and exchanges by a standardised form of signalling, known as Common Channel Signalling System Number Seven (CCS7). The thesis focuses on CCS7 performance, models and topologies. A requirement of the research entails the study of the CCS7 performance parameters: signalling delays and signalling network dependability. Signalling delays may be comprised of signalling message transfer delays within the message transfer part and queueing delays. Signalling network dependability usually include availability, reliability, maintainability and network robustness. For the purpose of modelling, the decomposition of the CCS7 message transfer part into subsystems is essential. A generic model for the message transfer part was used to implement certain functionalities of CCS7 in OPNET. OPNET (Optimised Network Engineering Tools) is a comprehensive engineering system capable of simulating large communication networks with detailed protocol modelling and performance analysis. The simulation software (OPNET) and performance parameters were used to analyse CCS7 networks resulting in the selection of a particular topology for a given region. The network structures analysed include the mesh topology, standard quad topology, hierarchical topology and Telstra's new topology. It was found that the mesh structure had the best simulated and availability/reliability results but was impractical for large networks due to the cost implications. This cost factor led to the selection of a hierarchical signalling system for Kwa-Zulu Natal.
Multiple ring networks in clustered traffic environments.
(1998) Green, Breton.
Ring networks are appropriate for the full range of network levels, including multiprocessor systems, local area computer networks and high speed backbones. The most well known and widely implemented examples are the IBM token ring and FDDI networks. Ring networks have the advantages of high channel utilisation and bounded delay if an n-limited service policy is used. The packet transfer delay, defined as the average time a packet spends in the network from the time it is generated until the time it is received at its destination node, improves with the number of rings on which a node is connected. However, many ring connections are not economically feasible since the cost of the ring interface increases with the number of rings. There has been an abundance of previous work on single token ring networks. A number of papers on slotted rings, register insertion rings and more complex ring architectures have also been published. However, there is very little existing literature on multiple ring networks as well as ring networks in clustered traffic environments, i.e. where nodes from the same cluster tend to communicate more with each other than with other nodes in the network. This thesis focuses on two network topologies that make use of multiple rings and are well suited to clustered traffic environments: the two-connected multiple ring (2-MR) and the destination removal double ring (DRDR). For the 2-MR network, three different practical token-based protocols are investigated in an attempt to optimise performance. It is further shown that significant performance improvements can be achieved by employing a slotted ring protocol rather than the token ring protocol. The DRDR network is also examined and its performance compared to the aforementioned architectures. For each of the six cases, both random and clustered traffic patterns are considered and compared. Analytical results are derived which are verified by results obtained from computer simulations. Furthermore, we look at exact methods of analysing ring networks. A mean value analysis of a single token ring network with a I-limited service discipline is performed, which clearly shows the complexity exact methods introduce. Finally, although it has been stated in the literature that an exact analysis of a multiple symmetrical token ring network is intractable, we present a novel Markov chain approach that gives exact results for near zero loads.
The design of an HF band direct sequence point-to-point link for rural telecommunications.
(2000) Selmer, Roland Marc.
The following work documents the design of an HF band direct sequence point-to-point link as used in a rural environment. The dissertation begins with a description of the overall document layout. An introduction into the problems associated with providing rural access is then given, with special emphasis on wireless technologies. It is argued that the attributes of HF band radio make it a good candidate for providing wireless communications links for under serviced rural areas in South Africa. The pitfalls and disadvantages of using an ionospheric-based medium in which to propagate an electromagnetic wave are discussed and several solutions are put forward. One of these solutions is Direct Sequence Code Division Multiple Access (DS-CDMA). A thorough analysis of the principles of DS-CDMA is given with emphasis on its abilities to combat the negating effects of the HF channel. A CDMA HF system is then proposed, outlining the various practical and theoretical aspects. Next, an HF channel model is designed and simulated, first with no spreading or coding, then with just spreading and finally with spreading and coding. It is found that although the extra diversity of the spreading and coding aid in reducing the bit error probability, more detailed local measurements and refinement in the design of the channel model and simulated system are needed to increase performance. Various aspects of a practical system that was built are then discussed, highlighting issues such as hardware interfacing and the software design of a man-machine-interface. Field measurements are also given with estimates on an upper limit on expected performance of a practical system. Finally conclusions are given, detailing the achievements and shortcomings of the research.
Feasibility study of a neural network current controller for a boost rectifier.
(2000) Worthmann, Cedric Alwyn.; Diana, Gregory.
During the past two decades, Quality of Supply has become a serious problem for Variable Speed Drives in the industrial and commercial sectors. Quality of Supply problems can trip Variable Speed Drives, which results in loss of production, which is a significant problem in the paper and pulp industry. Researchers have proposed that Quality of Supply problems can be minimised in-house, using controlled front end rectifiers (boost rectifier), to maintain a regulated DC link voltage in the Variable Speed Drive configuration, as most faults are created by a varying supply voltage. This thesis extends the work performed on boost rectifiers by investigating the feasibility of replacing the classical controllers with a Continual Online Trained Artificial Neural Network current controller. The approach adopted in this thesis was to evaluate and extend the work previously performed on conventional boost rectifier current controllers and Continual Online Trained Artificial Neural Network current controlled inverter, at the University of Natal. During this evaluation, the respective controller shortcomings were identified and addressed. Thereafter the Continual Online Trained Artificial Neural Network current controller was modified, according to the control requirements of the boost rectifier, and used as a replacement for the conventional current controller in the boost rectifier system. Finally, the Continual Online Trained Artificial Neural Network current controller was evaluated to assess its viability as a current controller for a boost rectifier. The concept of implementing the real-time Continual Online Trained Artificial Neural Network current controller using a DSP (Digital Signal Processor) was described, along with the main features and practical limitations of existing commercial DSP's. It is shown that at the time of writing of this thesis, the commercially available DSP' s are not powerful enough to implement the Continual Online Trained Artificial Neural Network current controller. However this thesis also shows that it is feasible to implement the real-time controller on the newly released TMS320C67 DSP card.
A low cost, high performance pc based integrated real-time motion control development system.
(2000) Stylo, Adam Wojciech.; Diana, Gregory.
The control of electrical drives, or motion control, is important in modern industry. In order to satisfy the requirements of industry, it is important for tertiary institutions to produce graduates skilled in this field. The theoretical content of a typical electrical engineering course will prepare students to tackle design and offline simulation of a digital motion controller. However, to gain an in-depth understanding of the field, students need to be able to implement and test their designs in practice. The complete design process of a digital motion controller is an inherently lengthy process requiring a number of diverse skills, for example microprocessor based hardware and software design. While hardware design issues can be minimised by a choice of a commercially available controller board, the coding of real-time software for a complex controller can pose a steep learning curve. At the undergraduate level, students seldom will possess sufficient practical expertise to fully implement a challenging motion control design in the limited time frames allocated for such projects. This thesis presents a complete rapid prototyping environment for the design of motion control, the Control System Development Environment (CSDE). The CSDE allows a seamless progression of a motion control project through all stages, from initial design and simulation, through real-time implementation to final online tuning and validation. Users are freed from all low-level software and hardware design issues. In the context of undergraduate design projects, the CSDE allows students to design, simulate and prototype challenging solutions in the limited time available. Thus, students can gain in-depth, system level expertise in the design of motion control without being hampered by low-level design issues. The CSDE has been successfully tested by a number of undergraduate students at the Department of Electrical Engineering at the University of Natal. In particular, the CSDE's effectiveness has been demonstrated by its application during two prize winning final year design projects.
A slotted-CDMA based wireless-ATM link layer : guaranteeing QoS over a wireless link.
(2000) Parry, Gareth Ross.; Peplow, Roger Charles Samuel.
Future wireless networks will have to handle varying combinations of multimedia traffic that present the network with numerous quality of service (QoS) requirements. The continuously growing demand for mobile phones has resulted in radio spectrum becoming a precious resource that cannot be wasted. The current second-generation mobile networks are designed for voice communication and, even with the enhancements being implemented to accommodate data, they cannot efficiently handle the multimedia traffic demands that will be introduced in the near future. This thesis begins with a survey of existing wireless ATM (WATM) protocols, followed by an examination of some medium access control (MAC) protocols, supporting multimedia traffic, and based on code division multiple access (CDMA) physical layers. A WATM link layer protocol based on a CDMA physical layer, and incorporating techniques from some of the surveyed protocols, is then proposed. The MAC protocol supports a wide range of service requirements by utilising a flexible scheduling algorithm that takes advantage of the graceful degradation of CDMA with increasing user interference to schedule cells for transmission according to their maximum bit error rate (BER) requirements. The data link control (DLC) accommodates the various traffic types by allowing virtual channels (VCs) to make use of forward error correction (FEc) or retransmission techniques. The proposed link layer protocol has been implemented on a Blue Wave Systems DSP board that forms part of Alcatel Altech Telecoms' software radio platform. The details and practicality of the implementation are presented. A simulation model for the protocol has been developed using MIL3 's Opnet Modeler. Hence, both simulated and measured performance results are presented before the thesis concludes with suggestions for improvements and future work.
The application of controllable inverter-based series compensation to power oscillation damping.
(2000) Chonco, Nkosinathi Stanford.; Rigby, Bruce S.; Harley, Ronald G.
Poorly damped oscillations that occur between the generators in large interconnected power systems often limit the amount of power that can be transmitted through a transmission corridor and are a threat to secure system operation. Coordinated insertion and removal of capacitors in series with a transmission line is one of the approaches that has been known for many years to be capable of enhancing the damping of power system oscillations. Unfortunately however, this approach historically relied on the operation of mechanical circuit breakers which were too slow and unreliable for the high-speed and repetitive operation that such an application demands. Recently-emerged, high-speed power-electronic-based switching devices are finding increasing use in modem power systems in the so-called Flexible AC Transmission Systems (F ACTS) concept. One particular FACTS impedance controller, namely the inverter-based series compensator, can rapidly alter the magnitude of capacitive compensating reactance in series with the line to make it practically feasible to enhance the damping of power system oscillations via dynamically-controlled series compensation. This thesis identifies, in the literature, an insightful approach to the design of an idealised controllable series compensator (CSC) damping scheme; such an approach has been considered in the analyses of the thesis. Three mathematical models of a single-machine infinite bus (SMIB) system are developed and are subsequently used in the initial design and analysis of a CSC damping controller carried out in the thesis. The simple SMIB system case study is used to identify and investigate the factors that have a significant impact on the performance of a CSC damping controller before studying the more complex issue of inter-area mode damping using a CSC. This thesis successfully confirms the results of a previous analytical study in which an idealised representation of the CSC was used, and extends the scope of that previous study by also considering a detailed representation of one particular type of CSC: the inverter-based series compensator. The two key findings of this extended investigation are that the inverter-based form of controllable series compensator can successfully be used to damp power oscillations and that, where the damping of oscillations is the particular focus of study, an idealised representation of the inverterbased CSC is suitable for the analyses. In the case of the inter-area mode damping problem, the selection of an appropriate input signal to the CSC damping controller is a key issue, since the oscillations that are to be damped involve a number of participating generators. This thesis examines the suitability of a few candidate input signals that have been proposed in the literature using the conceptually simpler SMIB system analytical models that have been developed. Finally, the thesis applies the understanding of CSC damping controller design gained from the SMIB study to the problem of inter-area mode damping on a four-generator study system. Time-domain simulation results are presented to demonstrate the impact of the controlled inverter-based series compensator on the damping of the inter-area mode of this system.
Power control in multimedia CDMA cellular networks.
(2000) Sharma, Neeru.; Takawira, Fambirai.
Wireless mobile communication is witnessing a rapid growth in, and demand for, improved technology and range of information types and services. Further, third generation cellular networks are expected to provide mobile users with ubiquitous wireless access to a global backbone architecture that carries a wide variety of electronic services. We examine the topic of power control and models that arc suitable for modem third generation wireless networks. CDMA technology is proving to be a promising and attractive approach for spectrally efficient, economical and high quality digital communications wireless networks. This thesis addresses the challenge of integrating heterogeneous transmitting sources with a broad range of Quality of Service characteristics in the cellular COMA networks. Provided the right power control can be devised, COMA offers the potential of extracting gain from the statistical multiplexing of such sources. A distributed power control algorithm is proposed which is required to update the transmitted power of the mobiles in each of the service classes locally. and enhance the performance of the system significantly. Algorithms for pragmatic issues like power level quantization and truncation of power are derived and incorporated into the proposed distributed power control algorithm.
Wireless wideband DS-CDMA point-to-multipoint system for distance education services.
(2001) Maragela, Edgar O.; Mneney, Stanley Henry.
A review of possible distance education services is given. These services range from narrowband to broadband, from real to non-real time and from broadcast to fully interactive services. The service target groups include the rural schools and communities who are scattered in remote areas. The performances of multiple access techniques, FDMA, TDMA and CDMA when in use for the provision of point-to-multipoint multimedia services is compared. A hybrid of the satellite and terrestrial access networks for the implementation of the distance education services is presented. The feasibility of implementing the proposed satellite network as part of the total network using the FDMA technique is presented. The rest of the work done in the thesis concentrates on the terrestrial network. The terrestrial part of the network is based on fixed cellular DS-CDMA techniques. The fixed cellular network's specifications, modeling and a discussion of the capacity, BER performance, bandwidth requirements and coverage are presented. The link budget estimation of the performance is given. Lastly a review of propagation characteristics for a terrestrial rural environment and a review of DS-CDMA concepts are presented in the appendix.
Space-time multiuser detection of multi-carrier DS-CDMA systems.
(2001) Whitehead, James Bruce.; Takawira, Fambirai.
Personal wireless communications networks have flourished over the last decade as advances in digital cellular technology have made them more accessible to the general public. Third Generation Cellular Communication systems based on code division multiple access (CDMA) as the multiple access technique, show great scope for improvement in terms of capacity, through the use of advanced signal processing techniques. Two of the leading areas that encompass these techniques are space-time processing (smart antennas) and multiuser detection (MUD). Space-time-MUD (ST-MUD) is a relatively new field that hopes to bring together these two techniques. The focus of this thesis is ST -MUD in the context of a multi-carrier direct sequence CDMA (MC-DS-CDMA) communications system, which is one of the adopted multiple access techniques for the upcoming third generation cellular communications systems. The concepts of MUD and smart antennas are discussed, and their performance enhancing capabilities are demonstrated. The use of vector channel models and their role in modelling the propagation phenomena of the communications channel in terms of the space, time and frequency domains is also illustrated. A ST-MUD receiver architecture is presented, and the performance of the architecture with a minimum mean square error (MMSE) decision criterion is analysed in a frequency selective Rayleigh fading channel. The analysis results are verified via simulation. Three subspace MUD techniques are adapted for ST -MUD, and the joint space-frequency- multi path MMSE solution on these subspaces is given. Simulation results are used to quantify their relative performance. The relevance and applications of the subspace techniques are elaborated.
Implementation of an application specific low bit rate video compression scheme.
(2001) McIntosh, Ian James.; Peplow, Roger Charles Samuel.
The trend towards digital video has created huge demands all the link bandwidth required to carry the digital stream, giving rise to the growing research into video compression schemes. General video compression standards, which focus on providing the best compression for any type of video scene, have been shown to perform badly at low bit rates and thus are not often used for such applications. A suitable low bit rate scheme would be one that achieves a reasonable degree of quality over a range of compression ratios, while perhaps being limited to a small set of specific applications. One such application specific scheme. as presented in this thesis, is to provide a differentiated image quality, allowing a user-defined region of interest to be reproduced at a higher quality than the rest of the image. The thesis begins by introducing some important concepts that are used for video compression followed by a survey of relevant literature concerning the latest developments in video compression research. A video compression scheme, based on the Wavelet transform, and using an application specific idea, is proposed and implemented on a digital signal processor (DSP), the Philips Trimedia TM·1300. The scheme is able to capture and compress the video stream and transmit the compressed data via a low bit· rate serial link to be decompressed and displayed on a video monilor. A wide range of flexibility is supported, with the ability to change various compression parameters 'on-the-fly', The compression allgorithm is controlled by a PC application that displays the decompressed video and the original video for comparison, while displaying useful rate metrics such as Peak Signal to Noise Ratio (PSNR), Details of implementation and practicality are discussed. The thesis then presents examples and results from both implementation and testing before concluding with suggestions for further improvement.
A network based prototyping system for applications in research and engineering education.
(2001) Pillay, Magash.; Diana, Gregory.
Engineering educators the world over are being faced with the dilemma of combining traditional mathematically intensive courses, like Control Systems and Robotics with advances in computational hardware and software. This is because it is impractical to include both software engineering issues as well as conventional course content. A solution to the problem lies in Rapid Prototyping technology to develop and design software, for application on PC's and embedded systems. Rapid Prototyping, based on automatic code generation, allows users to develop advanced software on high level graphical platforms like Simulink® and LabView®, while " hiding" the underlying layers of complex code. This approach allows the advanced hardware, traditionally reserved for software engineers, to be accessed by a much wider audience and is an ideal educational tool. This thesis presents the complete development of the Rapid Application Development Environment (RADE). The RADE system customises the Mathworks Real Time Workshop (RTW) revision 11 for application on both standalone and networked DS? cards. The functionality of the RTW is incorporated into the RADE system. This affords the user seamless code generation, downloading, on-line parameter tuning and on-line data visualisation with storage capability. An added advantage of the RADE system is its easy portability to multiple target platforms, which is demonstrated by its implementation on two different DSP cards. Finally the functionality of the RADE system is demonstrated as an educational tool, with the demonstration of a DC motor speed and position controller.
Test bed system for investigating the energy usage of variable speed drive systems.
(2001) Walker, Myles Larcome.; Diana, Gregory.
As South Africa's electricity consumption increases, Eskom is promoting Demand Side Management (DSM) to aid control of both the electricity consumption and its more effective usage, thereby delaying the need to construct new power stations, which pose large economic and environmental problems. Eskom has investigated various DSM strategies, such as load shifting, co-generation, alternative fuels and energy efficient processes, and has targeted the areas of load shifting and energy efficiency as prime areas for energy savings as they are relatively inexpensive and easy to implement. Pumps and fans form a large part of the industrial load. By improving the power usage of these devices with the use of variable speed drives, large energy savings may be achieved. To enable the energy usage of industrial loads to be evaluated, a test bed system which enables a variable speed drive to be loaded with a configurable load, was constructed. The test bed system forms a tool for evaluating and demonstrating the energy savings that are possible, by replacing fixed speed drives with variable speed drives when controlling the flow rate of pumps and fans. Results from the test bed system show that by using variable speed operation of pumps and fans, some energy savings are achievable when compared to existing methods of flow control. The achievable energy savings are dependent on the system properties and the duty cycle of the pump or fan system.
The use of surge arresters in parallel for the lightning protection of pole mounted distribution transformers in Eskom.
(2002) Chatterton, Baden George.; Hoch, Derek A.; Stephen, Neil Robert.
Eskom (Electricity Supply Commission of South Africa) is the national electrical utility that provides the generation, transmission and distribution of electricity in South Africa. The majority of Eskom's electricity distribution is done with either 11 kV or 22kV electrical overhead networks. An unacceptable number of Eskom's pole mounted power transformers on these networks have been failing over the past six years in the Kwa-Zulu Natal region. The average transformer failure rate for the Distribution Eastern Region was calculated to be 2.4% per annum. International norms seem to indicate a transformer failure rate of between 0.5% and 1.0% per annum as acceptable. The estimated cost of these transformer failures was between R9 million and R13 million per annum for the Eastern Region. Eskom Distribution has seven regions and the total cost of these failures was considerable to the business. These transformer failures contributed an average of 5.3% per month of the Supply Loss Index (SLI) for the Eastern Region, with a maximum contribution of 14.5% per month of the SLI for the region. The SLI is an Eskom performance measure of the unavailability of supply of the networks. The Eskom plant performance database (NAPI) was statistically analysed in detail and a number of field investigations conducted at transformer installations that had failed in the past. Transformer earth electrode resistance measurements were taken in an attempt to identify the cause of these transformer failures. Local transformer manufacturers were consulted and a national transformer refurbishment company's database was analysed during the investigation as part of a holistic approach to the industry related dissertation. The main finding of the NAPI data analysis was that the majority of the transformers failed during lightning storm periods. Another similar Eskom investigation had a sample of failed transformers opened for internal inspection. Signs of lightning damage to either the primary side winding or the primary lead were found. The proposed failure hypothesis was that the transformers required additional lightning protection of the primary side to protect the transformer against lightning. It seemed that the current specification of the Eskom distribution class surge arresters was inadequate to offer sufficient lightning protection of the pole mounted transformers. Practical measures were implemented on existing Eskom 11 kV networks in the Glencoe area as part of an Eskom research project to reduce the high failure rates of transformers. Two experimental networks were established and one control network was used as a reference line. The project implementation was completed at the end of October 1999. The experimental project looked at applying additional primary side lightning protection of the transformers. The main emphasis of the lightning protection on the first network was the use of two distribution class arresters in parallel (double arrester configuration) for each transformer and an understrung conductor connected to the prior structure back from the transformer installation. The second network had the standard single arresters installed on the transformers. A 600mm wood path was placed in series with an earthed down conductor installed on each intermediate woodpole structure to ensure a basic insulation level of 300kV for the network. The control network also had single arresters installed and was a fully insulated network (no earthed down conductor on the woodpoles). Each network was carefully monitored in terms of equipment failures and the performance levels of each network was measured with installed voltage dip recorders near the individual network circuit breakers. The Eskom Lightning Position and Tracking System (LPATS) data was collected and analysed to quantify the lightning activity before the project implementation to that of after project implementation. For the period November 1999 to March 2002 not a single transformer or surge arrester had failed ,due to lightning on the double arrester and understrung conductor configuration experimental network. There were recorded transformer and surge arrester failures on the second experimental network and on the control network. It was found that the practical methods implemented on the networks did not have a negative impact on the performance levels of the networks. Laboratory work was conducted in the high voltage laboratory at the University of Natal, on various metal oxide varistor (MOV) blocks of opened up new and failed surge arresters. This was to determine the effect of MOV blocks in parallel under power frequency and current impulse conditions. In particular, to determine what the effect of parallel MOV blocks with different voltage-current (V-I) characteristics would have on the current sharing and energy absorption capabilities of the individual blocks. The work was performed to simulate the behaviour of two surge arresters in parallel as in the experimental project. The experimental project lines were modeled using the Alternative Transients Program (ATP) simulation package and various parametric studies performed in the single phase conductor simulations. Each network component (such as the line, transformer and surge arrester) and phenomena (such as the effect of corona, the transient earth electrode resistance and voltage flashover) were modeled. The effect of surge arresters in parallel and the use of an understrung conductor arrangement were quantified. A current sharing factor (k-factor) was introduced to quantify the sharing of currents through surge arresters in parallel with different V-I curves. The main finding from the impulse laboratory work was that current sharing between parallel MOV blocks became better at higher currents. This finding was supported by other research work findings, particularly in the field of nuclear fusion research with parallel arresters. The results of the ATP simulations showed that the experimental network with the parallel arresters and understrung conductor arrangement considerably reduced the energy absorbed by the individual arresters. The effect of the double arrester configuration was to reduce the energy absorbed by the individual arresters even with arresters with different V-I characteristics and different manufacturers. The understrung conductor arrangement was found to be the major contributor towards the reduction of the energy absorbed by the arresters. The equivalent circuit of a MOV block for transient studies was proposed and then simulated in ATP. The simulated results were compared to the measured waveforms obtained from the impulse laboratory work. A good agreement between the simulated and measured waveforms was obtained. For existing Eskom networks with high arrester and transformer failure rates, the double arrester (distribution class) configuration would be the most time and cost effective solution. The alternative of using a single station class arrester is not proposed due to the costs involved and the availability of stock. The understrung conductor arrangement did significantly reduce the energy absorbed by the arresters but due to high labour costs and time requirements this would not be recommended for existing networks. It is suggested that Eskom investigate this practical method for new lines to be built in high lightning areas. Even with arresters from different manufacturers, the use of the double arrester configuration would decrease the energy absorbed and hence reduce the risk of failure of the individual arresters protecting the transformer. This means that Eskom field staff can use different manufacturer arresters in parallel. This would be especially for times when replacing failed arresters or a faulty transformer under breakdown conditions and electrical supply has to be restored to the customer as soon as possible. It was proposed to perform arrester matching by ensuring that the both arresters were from the same manufacturer.

Browse

Browsing Masters Degrees (Electrical Engineering) by Issue Date

Results Per Page

Sort Options